SAM3XA UART

Universal Asynchronous Receiver Transmitter (UART) User Interface

Registers

Register Mapping

Address	Register	Name	Access	Reset
0x400E0800	Control Register	UART_CR	write-only	-
0x400E0804	Mode Register	UART_MR	read-write	0x00000000
0x400E0808	Interrupt Enable Register	UART_IER	write-only	-
0x400E080C	Interrupt Disable Register	UART_IDR	write-only	-
0x400E0810	Interrupt Mask Register	UART_IMR	read-only	0x00000000
0x400E0814	Status Register	UART_SR	read-only	-
0x400E0818	Receive Holding Register	UART_RHR	read-only	0x00000000
0x400E081C	Transmit Holding Register	UART_THR	write-only	-
0x400E0820	Baud Rate Generator Register	UART_BRGR	read-write	0x00000000
0x400E0900	Receive Pointer Register	UART_RPR	read-write	0x00000000
0x400E0904	Receive Counter Register	UART_RCR	read-write	0x00000000
0x400E0908	Transmit Pointer Register	UART_TPR	read-write	0x00000000
0x400E090C	Transmit Counter Register	UART_TCR	read-write	0x00000000
0x400E0910	Receive Next Pointer Register	UART_RNPR	read-write	0x00000000
0x400E0914	Receive Next Counter Register	UART_RNCR	read-write	0x00000000
0x400E0918	Transmit Next Pointer Register	UART_TNPR	read-write	0x00000000
0x400E091C	Transmit Next Counter Register	UART_TNCR	read-write	0x00000000
0x400E0920	Transfer Control Register	UART_PTCR	write-only	0x00000000
0x400E0924	Transfer Status Register	UART_PTSR	read-only	0x00000000

Register Fields

UART Control Register

Name: UART_CR

Access: write-only

Address: 0x400E0800

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	-	RSTSTA
7	6	5	4	3	2	1	0
TXDIS	TXEN	RXDIS	RXEN	RSTTX	RSTRX	-	-

• RSTRX: Reset Receiver

  Value	Name	Description
  0	-	No effect.
  1	-	The receiver logic is reset and disabled. If a character is being received, the reception is aborted.

• RSTTX: Reset Transmitter

  Value	Name	Description
  0	-	No effect.
  1	-	The transmitter logic is reset and disabled. If a character is being transmitted, the transmission is aborted.

• RXEN: Receiver Enable

  Value	Name	Description
  0	-	No effect.
  1	-	The receiver is enabled if RXDIS is 0.

• RXDIS: Receiver Disable

  Value	Name	Description
  0	-	No effect.
  1	-	The receiver is disabled. If a character is being processed and RSTRX is not set, the character is completed before the receiver is stopped.

• TXEN: Transmitter Enable

  Value	Name	Description
  0	-	No effect.
  1	-	The transmitter is enabled if TXDIS is 0.

• TXDIS: Transmitter Disable

  Value	Name	Description
  0	-	No effect.
  1	-	The transmitter is disabled. If a character is being processed and a character has been written in the UART_THR and RSTTX is not set, both characters are completed before the transmitter is stopped.

• RSTSTA: Reset Status Bits

  Value	Name	Description
  0	-	No effect.
  1	-	Resets the status bits PARE, FRAME and OVRE in the UART_SR.

UART Mode Register

Name: UART_MR

Access: read-write

Address: 0x400E0804

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
CHMODE		-	-	PAR			-
7	6	5	4	3	2	1	0
-	-	-	-	-	-	-	-

• PAR: Parity Type

  Value	Name	Description
  0x0	EVEN	Even parity
  0x1	ODD	Odd parity
  0x2	SPACE	Space: parity forced to 0
  0x3	MARK	Mark: parity forced to 1
  0x4	NO	No parity

• CHMODE: Channel Mode

  Value	Name	Description
  0x0	NORMAL	Normal Mode
  0x1	AUTOMATIC	Automatic Echo
  0x2	LOCAL_LOOPBACK	Local Loopback
  0x3	REMOTE_LOOPBACK	Remote Loopback

UART Interrupt Enable Register

Name: UART_IER

Access: write-only

Address: 0x400E0808

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	RXBUFF	TXBUFE	-	TXEMPTY	-
7	6	5	4	3	2	1	0
PARE	FRAME	OVRE	ENDTX	ENDRX	-	TXRDY	RXRDY

• RXRDY: Enable RXRDY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• TXRDY: Enable TXRDY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• ENDRX: Enable End of Receive Transfer Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• ENDTX: Enable End of Transmit Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• OVRE: Enable Overrun Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• FRAME: Enable Framing Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• PARE: Enable Parity Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• TXEMPTY: Enable TXEMPTY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• TXBUFE: Enable Buffer Empty Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

• RXBUFF: Enable Buffer Full Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the corresponding interrupt.

UART Interrupt Disable Register

Name: UART_IDR

Access: write-only

Address: 0x400E080C

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	RXBUFF	TXBUFE	-	TXEMPTY	-
7	6	5	4	3	2	1	0
PARE	FRAME	OVRE	ENDTX	ENDRX	-	TXRDY	RXRDY

• RXRDY: Disable RXRDY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• TXRDY: Disable TXRDY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• ENDRX: Disable End of Receive Transfer Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• ENDTX: Disable End of Transmit Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• OVRE: Disable Overrun Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• FRAME: Disable Framing Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• PARE: Disable Parity Error Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• TXEMPTY: Disable TXEMPTY Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• TXBUFE: Disable Buffer Empty Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

• RXBUFF: Disable Buffer Full Interrupt

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the corresponding interrupt.

UART Interrupt Mask Register

Name: UART_IMR

Access: read-only

Address: 0x400E0810

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	RXBUFF	TXBUFE	-	TXEMPTY	-
7	6	5	4	3	2	1	0
PARE	FRAME	OVRE	ENDTX	ENDRX	-	TXRDY	RXRDY

• RXRDY: Mask RXRDY Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• TXRDY: Disable TXRDY Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• ENDRX: Mask End of Receive Transfer Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• ENDTX: Mask End of Transmit Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• OVRE: Mask Overrun Error Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• FRAME: Mask Framing Error Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• PARE: Mask Parity Error Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• TXEMPTY: Mask TXEMPTY Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• TXBUFE: Mask TXBUFE Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

• RXBUFF: Mask RXBUFF Interrupt

  Value	Name	Description
  0	-	The corresponding interrupt is disabled.
  1	-	The corresponding interrupt is enabled.

UART Status Register

Name: UART_SR

Access: read-only

Address: 0x400E0814

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	RXBUFF	TXBUFE	-	TXEMPTY	-
7	6	5	4	3	2	1	0
PARE	FRAME	OVRE	ENDTX	ENDRX	-	TXRDY	RXRDY

• RXRDY: Receiver Ready

  Value	Name	Description
  0	-	No character has been received since the last read of the UART_RHR or the receiver is disabled.
  1	-	At least one complete character has been received, transferred to UART_RHR and not yet read.

• TXRDY: Transmitter Ready

  Value	Name	Description
  0	-	A character has been written to UART_THR and not yet transferred to the Shift Register, or the transmitter is disabled.
  1	-	There is no character written to UART_THR not yet transferred to the Shift Register.

• ENDRX: End of Receiver Transfer

  Value	Name	Description
  0	-	The End of Transfer signal from the receiver Peripheral Data Controller channel is inactive.
  1	-	The End of Transfer signal from the receiver Peripheral Data Controller channel is active.

• ENDTX: End of Transmitter Transfer

  Value	Name	Description
  0	-	The End of Transfer signal from the transmitter Peripheral Data Controller channel is inactive.
  1	-	The End of Transfer signal from the transmitter Peripheral Data Controller channel is active.

• OVRE: Overrun Error

  Value	Name	Description
  0	-	No overrun error has occurred since the last RSTSTA.
  1	-	At least one overrun error has occurred since the last RSTSTA.

• FRAME: Framing Error

  Value	Name	Description
  0	-	No framing error has occurred since the last RSTSTA.
  1	-	At least one framing error has occurred since the last RSTSTA.

• PARE: Parity Error

  Value	Name	Description
  0	-	No parity error has occurred since the last RSTSTA.
  1	-	At least one parity error has occurred since the last RSTSTA.

• TXEMPTY: Transmitter Empty

  Value	Name	Description
  0	-	There are characters in UART_THR, or characters being processed by the transmitter, or the transmitter is disabled.
  1	-	There are no characters in UART_THR and there are no characters being processed by the transmitter.

• TXBUFE: Transmission Buffer Empty

  Value	Name	Description
  0	-	The buffer empty signal from the transmitter PDC channel is inactive.
  1	-	The buffer empty signal from the transmitter PDC channel is active.

• RXBUFF: Receive Buffer Full

  Value	Name	Description
  0	-	The buffer full signal from the receiver PDC channel is inactive.
  1	-	The buffer full signal from the receiver PDC channel is active.

UART Receive Holding Register

Name: UART_RHR

Access: read-only

Address: 0x400E0818

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	-	-
7	6	5	4	3	2	1	0
RXCHR

• RXCHR: Received Character

-

UART Transmit Holding Register

Name: UART_THR

Access: write-only

Address: 0x400E081C

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	-	-
7	6	5	4	3	2	1	0
TXCHR

• TXCHR: Character to be Transmitted

-

UART Baud Rate Generator Register

Name: UART_BRGR

Access: read-write

Address: 0x400E0820

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
CD
7	6	5	4	3	2	1	0
CD

• CD: Clock Divisor

-

UART Receive Pointer Register

Name: UART_RPR

Access: read-write

Address: 0x400E0900

31	30	29	28	27	26	25	24
RXPTR
23	22	21	20	19	18	17	16
RXPTR
15	14	13	12	11	10	9	8
RXPTR
7	6	5	4	3	2	1	0
RXPTR

• RXPTR: Receive Pointer Register

-

UART Receive Counter Register

Name: UART_RCR

Access: read-write

Address: 0x400E0904

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
RXCTR
7	6	5	4	3	2	1	0
RXCTR

• RXCTR: Receive Counter Register

-

UART Transmit Pointer Register

Name: UART_TPR

Access: read-write

Address: 0x400E0908

31	30	29	28	27	26	25	24
TXPTR
23	22	21	20	19	18	17	16
TXPTR
15	14	13	12	11	10	9	8
TXPTR
7	6	5	4	3	2	1	0
TXPTR

• TXPTR: Transmit Counter Register

-

UART Transmit Counter Register

Name: UART_TCR

Access: read-write

Address: 0x400E090C

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
TXCTR
7	6	5	4	3	2	1	0
TXCTR

• TXCTR: Transmit Counter Register

-

UART Receive Next Pointer Register

Name: UART_RNPR

Access: read-write

Address: 0x400E0910

31	30	29	28	27	26	25	24
RXNPTR
23	22	21	20	19	18	17	16
RXNPTR
15	14	13	12	11	10	9	8
RXNPTR
7	6	5	4	3	2	1	0
RXNPTR

• RXNPTR: Receive Next Pointer

-

UART Receive Next Counter Register

Name: UART_RNCR

Access: read-write

Address: 0x400E0914

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
RXNCTR
7	6	5	4	3	2	1	0
RXNCTR

• RXNCTR: Receive Next Counter

-

UART Transmit Next Pointer Register

Name: UART_TNPR

Access: read-write

Address: 0x400E0918

31	30	29	28	27	26	25	24
TXNPTR
23	22	21	20	19	18	17	16
TXNPTR
15	14	13	12	11	10	9	8
TXNPTR
7	6	5	4	3	2	1	0
TXNPTR

• TXNPTR: Transmit Next Pointer

-

UART Transmit Next Counter Register

Name: UART_TNCR

Access: read-write

Address: 0x400E091C

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
TXNCTR
7	6	5	4	3	2	1	0
TXNCTR

• TXNCTR: Transmit Counter Next

-

UART Transfer Control Register

Name: UART_PTCR

Access: write-only

Address: 0x400E0920

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	TXTDIS	TXTEN
7	6	5	4	3	2	1	0
-	-	-	-	-	-	RXTDIS	RXTEN

• RXTEN: Receiver Transfer Enable

  Value	Name	Description
  0	-	No effect.
  1	-	Enables PDC receiver channel requests if RXTDIS is not set.

• RXTDIS: Receiver Transfer Disable

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the PDC receiver channel requests.

• TXTEN: Transmitter Transfer Enable

  Value	Name	Description
  0	-	No effect.
  1	-	Enables the PDC transmitter channel requests.

• TXTDIS: Transmitter Transfer Disable

  Value	Name	Description
  0	-	No effect.
  1	-	Disables the PDC transmitter channel requests.

UART Transfer Status Register

Name: UART_PTSR

Access: read-only

Address: 0x400E0924

31	30	29	28	27	26	25	24
-	-	-	-	-	-	-	-
23	22	21	20	19	18	17	16
-	-	-	-	-	-	-	-
15	14	13	12	11	10	9	8
-	-	-	-	-	-	-	TXTEN
7	6	5	4	3	2	1	0
-	-	-	-	-	-	-	RXTEN

• RXTEN: Receiver Transfer Enable

  Value	Name	Description
  0	-	PDC Receiver channel requests are disabled.
  1	-	PDC Receiver channel requests are enabled.

• TXTEN: Transmitter Transfer Enable

  Value	Name	Description
  0	-	PDC Transmitter channel requests are disabled.
  1	-	PDC Transmitter channel requests are enabled.