00001 /*----------------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 15. July 2011 00005 * $Revision: V1.0.10 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_biquad_cascade_df2T_init_f32.c 00009 * 00010 * Description: Initialization function for the floating-point transposed 00011 * direct form II Biquad cascade filter. 00012 * 00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00014 * 00015 * Version 1.0.10 2011/7/15 00016 * Big Endian support added and Merged M0 and M3/M4 Source code. 00017 * 00018 * Version 1.0.3 2010/11/29 00019 * Re-organized the CMSIS folders and updated documentation. 00020 * 00021 * Version 1.0.2 2010/11/11 00022 * Documentation updated. 00023 * 00024 * Version 1.0.1 2010/10/05 00025 * Production release and review comments incorporated. 00026 * 00027 * Version 1.0.0 2010/09/20 00028 * Production release and review comments incorporated 00029 * 00030 * Version 0.0.7 2010/06/10 00031 * Misra-C changes done 00032 * ---------------------------------------------------------------------------*/ 00033 00034 #include "arm_math.h" 00035 00073 void arm_biquad_cascade_df2T_init_f32( 00074 arm_biquad_cascade_df2T_instance_f32 * S, 00075 uint8_t numStages, 00076 float32_t * pCoeffs, 00077 float32_t * pState) 00078 { 00079 /* Assign filter stages */ 00080 S->numStages = numStages; 00081 00082 /* Assign coefficient pointer */ 00083 S->pCoeffs = pCoeffs; 00084 00085 /* Clear state buffer and size is always 2 * numStages */ 00086 memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t)); 00087 00088 /* Assign state pointer */ 00089 S->pState = pState; 00090 } 00091