SAM3XA EMAC
Ethernet MAC 10/100 (EMAC) User Interface
Registers
Address | Register | Name | Access | Reset |
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0x400B0000 | Network Control Register | EMAC_NCR | read-write | 0x00000000 |
0x400B0004 | Network Configuration Register | EMAC_NCFGR | read-write | 0x00000800 |
0x400B0008 | Network Status Register | EMAC_NSR | read-only | - |
0x400B0014 | Transmit Status Register | EMAC_TSR | read-write | 0x00000000 |
0x400B0018 | Receive Buffer Queue Pointer Register | EMAC_RBQP | read-write | 0x00000000 |
0x400B001C | Transmit Buffer Queue Pointer Register | EMAC_TBQP | read-write | 0x00000000 |
0x400B0020 | Receive Status Register | EMAC_RSR | read-write | 0x00000000 |
0x400B0024 | Interrupt Status Register | EMAC_ISR | read-write | 0x00000000 |
0x400B0028 | Interrupt Enable Register | EMAC_IER | write-only | - |
0x400B002C | Interrupt Disable Register | EMAC_IDR | write-only | - |
0x400B0030 | Interrupt Mask Register | EMAC_IMR | read-only | 0x00003FFF |
0x400B0034 | Phy Maintenance Register | EMAC_MAN | read-write | 0x00000000 |
0x400B0038 | Pause Time Register | EMAC_PTR | read-write | 0x00000000 |
0x400B003C | Pause Frames Received Register | EMAC_PFR | read-write | 0x00000000 |
0x400B0040 | Frames Transmitted Ok Register | EMAC_FTO | read-write | 0x00000000 |
0x400B0044 | Single Collision Frames Register | EMAC_SCF | read-write | 0x00000000 |
0x400B0048 | Multiple Collision Frames Register | EMAC_MCF | read-write | 0x00000000 |
0x400B004C | Frames Received Ok Register | EMAC_FRO | read-write | 0x00000000 |
0x400B0050 | Frame Check Sequence Errors Register | EMAC_FCSE | read-write | 0x00000000 |
0x400B0054 | Alignment Errors Register | EMAC_ALE | read-write | 0x00000000 |
0x400B0058 | Deferred Transmission Frames Register | EMAC_DTF | read-write | 0x00000000 |
0x400B005C | Late Collisions Register | EMAC_LCOL | read-write | 0x00000000 |
0x400B0060 | Excessive Collisions Register | EMAC_ECOL | read-write | 0x00000000 |
0x400B0064 | Transmit Underrun Errors Register | EMAC_TUND | read-write | 0x00000000 |
0x400B0068 | Carrier Sense Errors Register | EMAC_CSE | read-write | 0x00000000 |
0x400B006C | Receive Resource Errors Register | EMAC_RRE | read-write | 0x00000000 |
0x400B0070 | Receive Overrun Errors Register | EMAC_ROV | read-write | 0x00000000 |
0x400B0074 | Receive Symbol Errors Register | EMAC_RSE | read-write | 0x00000000 |
0x400B0078 | Excessive Length Errors Register | EMAC_ELE | read-write | 0x00000000 |
0x400B007C | Receive Jabbers Register | EMAC_RJA | read-write | 0x00000000 |
0x400B0080 | Undersize Frames Register | EMAC_USF | read-write | 0x00000000 |
0x400B0084 | SQE Test Errors Register | EMAC_STE | read-write | 0x00000000 |
0x400B0088 | Received Length Field Mismatch Register | EMAC_RLE | read-write | 0x00000000 |
0x400B0090 | Hash Register Bottom [31:0] Register | EMAC_HRB | read-write | 0x00000000 |
0x400B0094 | Hash Register Top [63:32] Register | EMAC_HRT | read-write | 0x00000000 |
0x400B0098 | Specific Address 1 Bottom Register | EMAC_SA1B | read-write | 0x00000000 |
0x400B009C | Specific Address 1 Top Register | EMAC_SA1T | read-write | 0x00000000 |
0x400B00A0 | Specific Address 2 Bottom Register | EMAC_SA2B | read-write | 0x00000000 |
0x400B00A4 | Specific Address 2 Top Register | EMAC_SA2T | read-write | 0x00000000 |
0x400B00A8 | Specific Address 3 Bottom Register | EMAC_SA3B | read-write | 0x00000000 |
0x400B00AC | Specific Address 3 Top Register | EMAC_SA3T | read-write | 0x00000000 |
0x400B00B0 | Specific Address 4 Bottom Register | EMAC_SA4B | read-write | 0x00000000 |
0x400B00B4 | Specific Address 4 Top Register | EMAC_SA4T | read-write | 0x00000000 |
0x400B00B8 | Type ID Checking Register | EMAC_TID | read-write | 0x00000000 |
0x400B00C0 | User Input/Output Register | EMAC_USRIO | read-write | 0x00000000 |
Register Fields
EMAC Network Control Register
Name: EMAC_NCR
Access: read-write
Address: 0x400B0000
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | THALT | TSTART | BP |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
WESTAT | INCSTAT | CLRSTAT | MPE | TE | RE | LLB | LB |
- LB: LoopBack
- LLB: Loopback local
- RE: Receive enable
- TE: Transmit enable
- MPE: Management port enable
- CLRSTAT: Clear statistics registers
- INCSTAT: Increment statistics registers
- WESTAT: Write enable for statistics registers
- BP: Back pressure
- TSTART: Start transmission
- THALT: Transmit halt
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EMAC Network Configuration Register
Name: EMAC_NCFGR
Access: read-write
Address: 0x400B0004
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | IRXFCS | EFRHD | DRFCS | RLCE |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RBOF | PAE | RTY | CLK | - | BIG | ||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
UNI | MTI | NBC | CAF | JFRAME | - | FD | SPD |
- SPD: Speed
- FD: Full Duplex
- JFRAME: Jumbo Frames
- CAF: Copy All Frames
- NBC: No Broadcast
- MTI: Multicast Hash Enable
- UNI: Unicast Hash Enable
- BIG: Receive 1536 bytes frames
- CLK: MDC clock divider
Value Name Description 0x0 MCK_8 MCK divided by 8 (MCK up to 20 MHz). 0x1 MCK_16 MCK divided by 16 (MCK up to 40 MHz). 0x2 MCK_32 MCK divided by 32 (MCK up to 80 MHz). 0x3 MCK_64 MCK divided by 64 (MCK up to 160 MHz). - RTY: Retry test
- PAE: Pause Enable
- RBOF: Receive Buffer Offset
Value Name Description 0x0 OFFSET_0 No offset from start of receive buffer. 0x1 OFFSET_1 One-byte offset from start of receive buffer. 0x2 OFFSET_2 Two-byte offset from start of receive buffer. 0x3 OFFSET_3 Three-byte offset from start of receive buffer. - RLCE: Receive Length field Checking Enable
- DRFCS: Discard Receive FCS
- EFRHD
- IRXFCS: Ignore RX FCS
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EMAC Network Status Register
Name: EMAC_NSR
Access: read-only
Address: 0x400B0008
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | IDLE | MDIO | - |
- MDIO
-
IDLE
Value Name Description 0 - The PHY logic is running. 1 - The PHY management logic is idle (i.e., has completed).
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EMAC Transmit Status Register
Name: EMAC_TSR
Access: read-write
Address: 0x400B0014
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | UND | COMP | BEX | TGO | RLES | COL | UBR |
- UBR: Used Bit Read
- COL: Collision Occurred
- RLES: Retry Limit exceeded
- TGO: Transmit Go
- BEX: Buffers exhausted mid frame
- COMP: Transmit Complete
- UND: Transmit Underrun
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EMAC Receive Buffer Queue Pointer Register
Name: EMAC_RBQP
Access: read-write
Address: 0x400B0018
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR | - | - |
- ADDR: Receive buffer queue pointer address
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EMAC Transmit Buffer Queue Pointer Register
Name: EMAC_TBQP
Access: read-write
Address: 0x400B001C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR | - | - |
- ADDR: Transmit buffer queue pointer address
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EMAC Receive Status Register
Name: EMAC_RSR
Access: read-write
Address: 0x400B0020
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | OVR | REC | BNA |
- BNA: Buffer Not Available
- REC: Frame Received
- OVR: Receive Overrun
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EMAC Interrupt Status Register
Name: EMAC_ISR
Access: read-write
Address: 0x400B0024
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | PTZ | PFRE | HRESP | ROVR | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TCOMP | TXERR | RLEX | TUND | TXUBR | RXUBR | RCOMP | MFD |
- MFD: Management Frame Done
- RCOMP: Receive Complete
- RXUBR: Receive Used Bit Read
- TXUBR: Transmit Used Bit Read
- TUND: Ethernet Transmit Buffer Underrun
- RLEX: Retry Limit Exceeded
- TXERR: Transmit Error
- TCOMP: Transmit Complete
- ROVR: Receive Overrun
- HRESP: Hresp not OK
- PFRE: Pause Frame Received
- PTZ: Pause Time Zero
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EMAC Interrupt Enable Register
Name: EMAC_IER
Access: write-only
Address: 0x400B0028
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | PTZ | PFR | HRESP | ROVR | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TCOMP | TXERR | RLE | TUND | TXUBR | RXUBR | RCOMP | MFD |
- MFD: Management Frame sent
- RCOMP: Receive Complete
- RXUBR: Receive Used Bit Read
- TXUBR: Transmit Used Bit Read
- TUND: Ethernet Transmit Buffer Underrun
- RLE: Retry Limit Exceeded
- TXERR
- TCOMP: Transmit Complete
- ROVR: Receive Overrun
- HRESP: Hresp not OK
- PFR: Pause Frame Received
- PTZ: Pause Time Zero
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EMAC Interrupt Disable Register
Name: EMAC_IDR
Access: write-only
Address: 0x400B002C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | PTZ | PFR | HRESP | ROVR | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TCOMP | TXERR | RLE | TUND | TXUBR | RXUBR | RCOMP | MFD |
- MFD: Management Frame sent
- RCOMP: Receive Complete
- RXUBR: Receive Used Bit Read
- TXUBR: Transmit Used Bit Read
- TUND: Ethernet Transmit Buffer Underrun
- RLE: Retry Limit Exceeded
- TXERR
- TCOMP: Transmit Complete
- ROVR: Receive Overrun
- HRESP: Hresp not OK
- PFR: Pause Frame Received
- PTZ: Pause Time Zero
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EMAC Interrupt Mask Register
Name: EMAC_IMR
Access: read-only
Address: 0x400B0030
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | PTZ | PFR | HRESP | ROVR | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TCOMP | TXERR | RLE | TUND | TXUBR | RXUBR | RCOMP | MFD |
- MFD: Management Frame sent
- RCOMP: Receive Complete
- RXUBR: Receive Used Bit Read
- TXUBR: Transmit Used Bit Read
- TUND: Ethernet Transmit Buffer Underrun
- RLE: Retry Limit Exceeded
- TXERR
- TCOMP: Transmit Complete
- ROVR: Receive Overrun
- HRESP: Hresp not OK
- PFR: Pause Frame Received
- PTZ: Pause Time Zero
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EMAC Phy Maintenance Register
Name: EMAC_MAN
Access: read-write
Address: 0x400B0034
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
SOF | RW | PHYA | |||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
PHYA | REGA | CODE | |||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
DATA | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DATA |
- DATA
- CODE
- REGA: Register Address
- PHYA: PHY Address
- RW: Read-write
- SOF: Start of frame
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EMAC Pause Time Register
Name: EMAC_PTR
Access: read-write
Address: 0x400B0038
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
PTIME | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PTIME |
- PTIME: Pause Time
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EMAC Pause Frames Received Register
Name: EMAC_PFR
Access: read-write
Address: 0x400B003C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
FROK | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FROK |
- FROK: Pause Frames received OK
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Frames Transmitted Ok Register
Name: EMAC_FTO
Access: read-write
Address: 0x400B0040
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
FTOK | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
FTOK | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FTOK |
- FTOK: Frames Transmitted OK
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Single Collision Frames Register
Name: EMAC_SCF
Access: read-write
Address: 0x400B0044
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SCF | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SCF |
- SCF: Single Collision Frames
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Multiple Collision Frames Register
Name: EMAC_MCF
Access: read-write
Address: 0x400B0048
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
MCF | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MCF |
- MCF: Multicollision Frames
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Frames Received Ok Register
Name: EMAC_FRO
Access: read-write
Address: 0x400B004C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
FROK | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
FROK | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FROK |
- FROK: Frames Received OK
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Frame Check Sequence Errors Register
Name: EMAC_FCSE
Access: read-write
Address: 0x400B0050
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FCSE |
- FCSE: Frame Check Sequence Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Alignment Errors Register
Name: EMAC_ALE
Access: read-write
Address: 0x400B0054
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALE |
- ALE: Alignment Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Deferred Transmission Frames Register
Name: EMAC_DTF
Access: read-write
Address: 0x400B0058
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
DTF | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DTF |
- DTF: Deferred Transmission Frames
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Late Collisions Register
Name: EMAC_LCOL
Access: read-write
Address: 0x400B005C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LCOL |
- LCOL: Late Collisions
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Excessive Collisions Register
Name: EMAC_ECOL
Access: read-write
Address: 0x400B0060
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
EXCOL |
- EXCOL: Excessive Collisions
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Transmit Underrun Errors Register
Name: EMAC_TUND
Access: read-write
Address: 0x400B0064
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TUND |
- TUND: Transmit Underruns
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Carrier Sense Errors Register
Name: EMAC_CSE
Access: read-write
Address: 0x400B0068
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CSE |
- CSE: Carrier Sense Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Receive Resource Errors Register
Name: EMAC_RRE
Access: read-write
Address: 0x400B006C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RRE | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RRE |
- RRE: Receive Resource Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Receive Overrun Errors Register
Name: EMAC_ROV
Access: read-write
Address: 0x400B0070
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ROVR |
- ROVR: Receive Overrun
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Receive Symbol Errors Register
Name: EMAC_RSE
Access: read-write
Address: 0x400B0074
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RSE |
- RSE: Receive Symbol Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Excessive Length Errors Register
Name: EMAC_ELE
Access: read-write
Address: 0x400B0078
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
EXL |
- EXL: Excessive Length Errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Receive Jabbers Register
Name: EMAC_RJA
Access: read-write
Address: 0x400B007C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RJB |
- RJB: Receive Jabbers
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Undersize Frames Register
Name: EMAC_USF
Access: read-write
Address: 0x400B0080
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
USF |
- USF: Undersize frames
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC SQE Test Errors Register
Name: EMAC_STE
Access: read-write
Address: 0x400B0084
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SQER |
- SQER: SQE test errors
Value Name Description 0x74CBB1 - 0 0x1608940C365 - 8 0x151ED2399749 - 16 0x1C7847EB8CF1 - 24
EMAC Received Length Field Mismatch Register
Name: EMAC_RLE
Access: read-write
Address: 0x400B0088
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RLFM |
- RLFM: Receive Length Field Mismatch
-
EMAC Hash Register Bottom [31:0] Register
Name: EMAC_HRB
Access: read-write
Address: 0x400B0090
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Hash Register Top [63:32] Register
Name: EMAC_HRT
Access: read-write
Address: 0x400B0094
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 1 Bottom Register
Name: EMAC_SA1B
Access: read-write
Address: 0x400B0098
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 1 Top Register
Name: EMAC_SA1T
Access: read-write
Address: 0x400B009C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 2 Bottom Register
Name: EMAC_SA2B
Access: read-write
Address: 0x400B00A0
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 2 Top Register
Name: EMAC_SA2T
Access: read-write
Address: 0x400B00A4
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 3 Bottom Register
Name: EMAC_SA3B
Access: read-write
Address: 0x400B00A8
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 3 Top Register
Name: EMAC_SA3T
Access: read-write
Address: 0x400B00AC
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 4 Bottom Register
Name: EMAC_SA4B
Access: read-write
Address: 0x400B00B0
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ADDR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ADDR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Specific Address 4 Top Register
Name: EMAC_SA4T
Access: read-write
Address: 0x400B00B4
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR |
- ADDR
-
EMAC Type ID Checking Register
Name: EMAC_TID
Access: read-write
Address: 0x400B00B8
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TID | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TID |
- TID: Type ID checking
-
EMAC User Input/Output Register
Name: EMAC_USRIO
Access: read-write
Address: 0x400B00C0
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | CLKEN | RMII |
- RMII: Reduce MII
- CLKEN: Clock Enable
-
-