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Design Rule Verification Report

Date : 4/5/2015
Time : 1:45:24 AM
Elapsed Time : 00:00:22
Filename : C:\Users\johnny\Documents\GitHub\Mini-Rambo\board\Mini-Rambo.PcbDoc
Warnings : 0
Rule Violations : 64

Summary

Warnings Count
Total 0

Rule Violations Count
Acute Angle Constraint (Minimum=60.000) (All) 44
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=24mil) (Air Gap=10mil) (Entries=4) (InNet('+12V')) 0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (IsVia) 0
Clearance Constraint (Gap=7mil) (IsVia),(IsVia) 0
Clearance Constraint (Gap=7mil) (IsPad),(IsVia) 0
Clearance Constraint (Gap=7mil) (IsPad),(IsPad) 0
Clearance Constraint (Gap=7mil) ((InLayerClass('Signal Layers') AND IsTrack)),(IsVia) 0
Clearance Constraint (Gap=7mil) ((InLayerClass('Signal Layers') AND IsTrack)),(IsPad) 0
Clearance Constraint (Gap=7mil) ((InLayerClass('Signal Layers') AND IsTrack)),((InLayerClass('Signal Layers') AND IsTrack)) 0
Net Antennae (Tolerance=0mil) (All) 0
Silk primitive without silk layer 0
Silk to Silk (Clearance=10mil) (Disabled)(All),(All) 0
Silk To Solder Mask (Clearance=10mil) (Disabled)(IsPad),(All) 0
Minimum Solder Mask Sliver (Gap=4mil) (All),(All) 7
Hole To Hole Clearance (Gap=8mil) (All),(All) 1
Hole Size Constraint (Min=15mil) (Max=100000mil) (All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Width Constraint (Min=7mil) (Max=250mil) (Preferred=24mil) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Clearance Constraint (Gap=7mil) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
SMD To Corner (Distance=3mil) (All) 12
Minimum Annular Ring (Minimum=7mil) (All) 0
Total 64

Acute Angle Constraint (Minimum=60.000) (All)
Acute Angle Constraint Between Pad on TopLayer And Track on TopLayer
Acute Angle Constraint Between Pad on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on TopLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on BottomLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on BottomLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And PolyRegion on TopLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Track on TopLayer And Pad on TopLayer
Acute Angle Constraint Between Track on TopLayer And Track on TopLayer
Acute Angle Constraint Between Pad on TopLayer And Track on TopLayer
Acute Angle Constraint Between Pad on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on TopLayer And Track on TopLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between PolyRegion on TopLayer And Track on TopLayer
Acute Angle Constraint Between Track on MidLayer1 And Track on MidLayer1
Acute Angle Constraint Between Track on MidLayer1 And Track on MidLayer1
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on TopLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Pad on TopLayer
Acute Angle Constraint Between Via on MultiLayer And PolyRegion on TopLayer
Acute Angle Constraint Between Track on TopLayer And PolyRegion on TopLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Via on MultiLayer And Via on MultiLayer
Acute Angle Constraint Between Pad on BottomLayer And Pad on MultiLayer
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Minimum Solder Mask Sliver (Gap=4mil) (All),(All)
Pad R71-2(3599.61mil,2852.365mil) Top Pad Q8-4(3653.543mil,2880.709mil) Top
Pad R9-2(3599.61mil,2899.61mil) Top Pad Q8-4(3653.543mil,2880.709mil) Top
Pad R9-2(3599.61mil,2899.61mil) Top Pad Q8-3(3653.543mil,2930.709mil) Top
Pad R71-2(3599.61mil,2852.365mil) Top Pad R9-2(3599.61mil,2899.61mil) Top
Pad R71-1(3546.066mil,2852.365mil) Top Pad R9-1(3546.066mil,2899.61mil) Top
Pad R16-1(3501.972mil,2903.737mil) Top Pad R9-1(3546.066mil,2899.61mil) Top
Pad R71-1(3546.066mil,2852.365mil) Top Pad R16-2(3501.972mil,2850.194mil) Top
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Hole To Hole Clearance (Gap=8mil) (All),(All)
Via (4264mil,2400mil) Top to Bottom Pad F2-2(4308mil,2384.095mil) Multi-Layer
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SMD To Corner (Distance=3mil) (All)
SMD To Corner Constraint (1.792mil < 3mil) Between Pad on MultiLayer And Track on TopLayer
SMD To Corner Constraint (1.403mil < 3mil) Between Pad on MultiLayer And Track on TopLayer
SMD To Corner Constraint (1.872mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (0.85mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (1.872mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (1.872mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (1.047mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (0.356mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (0.37mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (0.427mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (0.8mil < 3mil) Between Pad on TopLayer And Track on TopLayer
SMD To Corner Constraint (1.777mil < 3mil) Between Pad on TopLayer And Track on TopLayer
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